NXP Semiconductors
LPC1111/12/13/14
Table 3.
LPC1113/14 pin description table (LQFP48 package) …continued
Symbol
XTALIN
Pin
6 [5]
Type
I
Description
Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
XTALOUT
V SS
7 [5]
41
O
I
Output from the oscillator amplifier.
Ground.
[1]
[2]
[3]
[4]
[5]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
I 2 C-bus pads compliant with the I 2 C-bus specification for I 2 C standard mode and I 2 C Fast-mode Plus.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant.
Tie together V DD(3V3) and V DD(IO) externally. If separate supplies are used for V DD(3V3) and V DD(IO) , ensure that the voltage difference
between both supplies is smaller than or equal to 0.5 V.
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
Table 4.
LPC1114 pin description table (PLCC44 package)
Symbol
PIO0_0 to PIO0_11
Pin
Type
I/O
Description
Port 0 — Port 0 is a 12-bit I/O port with individual direction and function
controls for each bit. The operation of port 0 pins depends on the function
selected through the IOCONFIG register block.
RESET/PIO0_0
7
I
RESET — External reset input: A LOW on this pin resets the device,
causing I/O ports and peripherals to take on their default states, and
processor execution to begin at address 0.
I/O
PIO0_0 — General purpose digital input/output pin.
PIO0_1/CLKOUT/
8 [1]
I/O
PIO0_1 — General purpose digital input/output pin. A LOW level on this pin
CT32B0_MAT2
O
O
during reset starts the ISP command handler.
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2/SSEL0/
CT16B0_CAP0
PIO0_3
PIO0_4/SCL
14 [1]
18 [1]
19 [2]
I/O
O
I
I/O
I/O
I/O
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave Select for SPI0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3 — General purpose digital input/output pin.
PIO0_4 — General purpose digital input/output pin.
SCL — I 2 C-bus clock input/output. High-current sink only if I 2 C Fast-mode
Plus is selected in the I/O configuration register.
PIO0_5/SDA
20 [2]
I/O
I/O
PIO0_5 — General purpose digital input/output pin.
SDA — I 2 C-bus data input/output. High-current sink only if I 2 C Fast-mode
Plus is selected in the I/O configuration register.
PIO0_6/SCK0
PIO0_7/CTS
26 [1]
27 [1]
I/O
I/O
I/O
PIO0_6 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
PIO0_7 — General purpose digital input/output pin (high-current output
driver).
I
CTS — Clear To Send input for UART.
PIO0_8/MISO0/
CT16B0_MAT0
31 [1]
I/O
I/O
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SPI0.
LPC1111_12_13_14_0
O
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
? NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 00.11 — 13 November 2009
11 of 53
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